Positive Control Approach to Scheduling Problems

Introduction

This paper describes a simulation model and an actual implementation of the 1-Step Ahead Minimum Inventory Variability Resource Scheduling Policy^® (MIVP^®), in a semiconductor fabrication facility (FAB). The FAB described used a product release policy based on customer orders and a work-in-progress (WIP) chart. The scheduling of resource tools was done on a first-in-first-out (FIFO) basis on high speed tools and due-date-first (DDF) at bottleneck tools, except for high priority lots, called MAXI’s. The FAB is discussed in generic terms (sanitized) because of the proprietary nature of the devices manufactured.

Improving manufacturing by small increments over time based on extensive experience can be beneficial. An increase in production as small as 1% can potentially result in increased sales of $200,000 to $300,000 or more per month in semiconductor manufacturing. Changing normal strategies in a successful FAB require substantial supporting evidence that the change will be successful.

This article describes briefly: the theory behind MIVP^®; a simulation model representing the FAB; and the results of the 1^st phase of MIVP^® implementation.

Theory behind MIVP^®

The theory behind MIVP^® uses two basic laws, Little’s Law and Kingman’s Formula, from queuing theory in a unique way to control inventory on the factory.

Little’s law, better known as the Law of Inventory, in queueing theory [5] states that:

where, is inventory, is the mean arrival rate of products for processing, is the average total cycle time, namely the total processing time plus the total waiting time involved.

Kingman’s Formula accounts for random variations in arrival and processing times due to variability, [6] states that:

where, = inventory

V = input variability + capacity variability = input rate / processing rate 1

MIVP^® Scheduling and Release Policies developed by ACADZ, inc. introduces maximum correlation between inter-arrival times and service times to reduce the total wait times throughout the FAB and in turn reducing cycle time.

Minimum Inventory Variability Scheduling and Release Policies^® (MIVP^®)

With these policies, the dynamic inventory N(t) at time t, shown in Figure 1., will keep close to the long-term historical average inventory (the profile) in a stable factory and will cause the historical average to improve over time. This leads to the reduction of the scheduling variability, reduction in total inventory, and reduction in mean cycle time. The goal of MIVP^® is in balancing the overall production line to reduce WIP variability. Large queues in front of a particular resource will cause irregularity in the process flow, i.e., an unbalanced line: some stations are overloaded and some are starved. The mean cycle time will rise due to local starvation even though the total system inventory stays approximately the same, and it will rise due to the waiting time in the queue for those overloaded processing stations, see references [1,2,3,4,7,8,9].

Figure 1. WIP CHART [3,4,7,8]

The 1-Step Ahead MIVP^® Policy

The 1-Step Ahead decision sets of rules are applied in parallel throughout the FAB in a dynamic way. This distributed processing tends to balance the total production line and keeps the compute time for the schedule to a minimum.

For example, in Figure 1., four process steps require the service of Machine-A; which process step do we choose? Machine-A serving those four processing steps feeds the next machine in the process flow (called the bleeder machine). The objective from 1-Step Ahead MIVP^® is to look at the next queue down stream and select the lot (here in this example from the four available), which will leave its instantaneous queue length below its historical average. This example demonstrates one of the many objectives contained in the 1-Step Ahead MIVP^® Policies. Once a choice is made the lot is processed. When Machine-A becomes available again for processing, the rules of MIVP^® are invoked and the another choice is made in relation to the historical queues.

Semiconductor FAB Simulation Model

MIVP^® is aimed at meeting delivery schedules, reducing product cycle times, increasing product yield, increasing product through-put, optimizing utilization of equipment resources, increasing confidence for on-time delivery schedules, and increasing profits. In the manufacturing world, companies use process resource schedulers and product release policies, that agree with common sense and can be implemented on the factory floor. Any improvements to resource scheduling and product release policies must meet the above criteria and have demonstrable success.

We use stochastic discrete event simulation modeling to compare FIFO to MIVP^® scheduling and release policies. Our decision rules are company specific and rely on company management and operators experience to obtain the best performance. The rules can be easily implemented by operators on a factory floor.

A global understanding of all the complexities involved in wafer fabrication, starting with a raw wafer arrival through shipping the completed product is required to improve scheduling and release policies. The reentrant nature of certain critical resource tools, variations in recipes for processing due to multiple products, and the random nature of machine failures and repairs introduce a high level of complexity, and the number of variables to consider is very large.

The FAB simulation model must accurately include the production mix, the production flows, the production recipes and processing times, the equipment maintenance database, and labor.

The validated FAB simulation model compares FIFO, DDF and MAXI lots baseline data with one using new MIVP^® Policies. The development of the baseline FAB simulation model is a long and tedious process, but if done with care and flexibility for future updates, it will serve as an additional tool for management decision making.

To minimize cycle time, one must reduce inventory or increase capacity according to Little’s Law. If we extend this to Kingman’s formula, a reduction of variability can also have an effect on cycle time and reduce inventory. A balanced production line then is one if given a fixed input and output schedule, the mean work-in-progress does not increase over time due to randomness of machine failures and repairs. Section managers in a factory will introduce a safety factor into their machine capacity numbers, which takes into consideration this randomness. They want to protect against this variability to maintain a certain WIP and cycle time objective through their section of the FAB. Introducing new scheduling policies, which reduce cycle time and increase capacity at the same time, will meet with understandable resistance.

Unbalancing of a production line can be caused by unpredictable disturbances such as equipment failures and repairs, personnel decisions and power failures to mention a few. These disturbances disrupt the stable flow of products and may result in large queues for some machines while other machines remain idle. Large queues, no matter what the cause, are referred to as bottlenecks, and days or weeks might be required to re-balance the production line after they occur. Bottlenecks cause product to wait for service, thereby increasing cycle time (CT). For our discussion, cycle time is defined to be the sum of the total processing time (TPT) and the total queueing time (TQT). TPT is defined as the sum of all the raw processing times for each step in a production flow and TQT is defined as the sum of all the queue waiting times for resource service for each step in a production flow.

Millions of dollars can be spent on equipment to increase the capacity at a critical bottleneck resulting in reduced cycle time locally, but the overall cycle time of the product might not decrease. This local improvement approach might simply move the bottleneck to another location along the manufacturing line. Understanding that local changes to improve the service at overcrowded machines generally will not improve the total product cycle time is of utmost importance.

Model Statistics

This FAB produces a total of 73 different micro-controller devices on 55 different production flows, each with processing steps ranging from 185 to 395 steps (averaging 263 steps each). Ten of these products are on the factory floor at any given time, involving 132 machine groups with a total of 485 machines. The product can re-enter machine groups, such as Photo and Etch, from six to fourteen times, depending on the device being fabricated. Adding to this complexity the variability of MTBF, MTTR, and one can see that short interval scheduling based on knowledge of the global process is important.

Given the complexity of a multiple product FAB simulation modeling was used to demonstrate that MIVP^® could help improve cycle time by reducing WIP. Seminars were given for section managers on a weekly basis to introduce cycle time reduction and MIVP^® implementation procedures. The FAB Model was formulated with direct feedback from each of these section managers and operators. The team’s objective was to reduce cycle time to a set goal of 29 days on average and 32 days with 95% confidence, prior to the end of the 3rd quarter. The 1-Step Ahead MIVP^® was implemented on the factory floor using a WIP Chart and Priority Matrix^®. The MAXI priority schedules were maintained because of commitment to certain customers but the FIFO and DDF were changed to incorporate the 1-Step Ahead MIVP^® resource scheduler when variability required a change.

Data collected for the FAB Model included all the micro-controller devices manufactured in the past two years. This included 34 shop orders (production flows) for 55 devices. These are referred to as Product1, Product2, and Device1, Device2, etc. This FAB’s production flow was broken down into distinct operations such as Photo, Etch, Implant, Diffusion and Probe for the different metal layers on the device and given specific code names. These operation code names Op1, Op2, etc., were broken down into individual processing steps with actual process code names (Step1, Step2, etc.) which then could be managed by the process engineering teams for process improvement, etc. Sanitizing the FAB Model data in this way by changing the product (device names), the operation codes, and process step codes was necessary to protect the proprietary nature of this facility.

FAB Model Results

Once the FAB Model has been validated, the model was run to simulate 3 years of production. The first year was discarded due to ramp up bias and the second two years were used to collect the historical queue data using FIFO and DDF. This took two weeks on 100 MHertz Pentium. Once the FIFO baseline data was collected the switch to MIVP^® Policies was made in all equipment queues and the model was run again to simulate three years of production. The MIVP^® data was truncated and the last two years was used to make the comparisons with FIFO. The average cycle time for the last two years of production for all products produced were 35% lower than with FIFO.

FAB Implementation and Results

In this FAB, we developed a partial implementation of a 1-Step Ahead MIVP^® policy, on the shop floor under close supervision. When problems occurred in the FAB such as equipment failures at the bottleneck sections, Dr. Collins instructed the section managers and operators on how to use the MIVP^® WIP Charts and the MIVP^® priority matrix to get around the problem. By using these charts the operators slowed down the wafers that were headed for the downed machine while speeding up the wafers that were headed for the up machines. The only exceptions were the MAXI lots that were a very small percentage of the total lots being produced.

The objective to reach 29 days average was accomplished and even surpassed to 26.34 days. This represented a 29.7% reduction. The objective of 32 days with 95% confidence was almost achieved (31.61 days), giving a 32.9% reduction in cycle time. Over this same period wafer starts were decreased by only 1.9%, wafers shipped increased by 2.3%, wafer yields increased by 0.15%, and wafer scrap decreased by 23%. These positive results occurred in the period from May 1996 through October 1996 (see Table 2. below).

Table 2. FAB Implementation Results

Summary

The MIVP^® heuristic agreements have been applied in many simulation models and in the context of real factory production now in three FABs by [3,4,7,8,9] with results ranging from 15% to 45% reduction in cycle time.

References

[1] Kumar, S. and Kumar, P.R., Performance Bounds for Queueing Networks and Scheduling Policies, IEEE Transactions on Automatic Control, pages 1600-1611, Vol. 39, No. 8, Aug. 1994.

[2] Lu, Steve C. H., Ramaswamy, Deepa, and Kumar, P. R., Efficient Scheduling Policies to Reduce Mean and Variance of Cycle-Time in Semiconductor Manufacturing Plants, IEEE Transactions on Semiconductor Manufacturing, Pages 374-385, Vol. & II3, Aug. 1994.

[3] Li, S., Equi-Variability Graph Approach for Modeling of Manufacturing Systems, invited paper, Proceedings of the Twenty-Ninth Annual Allerton Conference, Allerton, Illinois, 1991.

[4] Li, S., Innovative Methods in Planning and Scheduling in Semiconductor Manufacturing, invited paper, Proceedings of the Semiconductor Manufacturing Technology Workshop, co-sponsored by National Taiwan University and Taiwan Industrial Technology Research Institute, Mar. 22, 1993.

[5] Little, J. D. C., A Proof of the Queueing Formula: L=lW. Operations Research, Vol. 9, 1961, pp. 383-387.

[6] Gelenbe, E. and Pujolle, G., Introduction to Queueing Networks, John Wiley & Sons Ltd., 1987.

[7] Tang, (Tom) Ynn-wann, Simulation Model for Minimum Inventory Variance Policy Practiced in Semiconductor Manufacturing Plants, M.T. Research Project, Department of Manufacturing and Industrial Technology, Arizona State University, Aug. 1993.

[8] Li, S., Tang, T, and Collins, D.W., Minimum Inventory Variability Schedule with Applications in Semiconductor Fabrication, IEEE Transaction on Semiconductor Manufacturing, Vol. 9, No. 1, pp. 145-149, February 1996.

[9] Wiedmeyer, R. J., A Minimum Inventory Variability Policy Computer Simulation Using SEMATECH Semiconductor Manufacturing Data, Master of Technology Research Project, Department of Manufacturing and Industrial Technology, Arizona State University, Tempe, (Aug. 1996).

Theory behind MIVP®

Semiconductor FAB Simulation Model

Model Statistics

FAB Model Results

FAB Implementation and Results

Theory behind MIVP^®