
A SIMULATION STUDY TO COMPARE
MINIMUM INVENTORY VARIABILITY POLICIES (MIVP®) AND
FIRST-IN-FIRST-OUT (FIFO) ALGORITHM
Donald W. Collins, Ph.D., Manufacturing and Aeronautical
Engineering Technology, College of Technology and Applied Sciences, Arizona
State University East, Mesa, AZ 85212 0903
email: donald.collins@asu.edu.us Fax: (602) 727-1549
Tabut Torsina, MTech, Simulation Engineer, Motorola MOS 12,
Chandler, Arizona
Robert Balgemann, MTech, Simulation Engineer, SEMATECH,
Austin, Texas
Keywords: Buffer,
capacity, DRAM, heuristics, scheduling algorithms, simulation, stochastic
modeling, throughput, variability, variance, waiting times
Semiconductor manufacturing is considered as one
of the most complex manufacturing processes today. It poses unique planning and
scheduling challenges including a large number of process steps, highly
reentrant process flows, variable batch sizes, and equipment reliability. These
complexities are some of the causes of excessive cycle time, low production
rates, missed due dates, and low machine utilization.
MIVP® K-Step-Ahead®
is a new and more
efficient resource scheduling policy designed to improve the productivity of
semiconductor manufacturing processes by minimizing the variance of inventories
caused by variations in queue lengths thus reducing overall cycle time. The
variability tested in this paper was that of emergency maintenance and product
inter-arrival rates.
The purpose of this study was to use stochastic
simulation to compare the cycle time results produced by two scheduling
policies, MIVP® K-Step-Ahead®
policy and
First-In-First-Out (FIFO). FIFO has long been considered the simplest and the
fairest resource-scheduling rule in manufacturing. The principal question addressed
in this dual study was to determine if there was a statistically significant
difference in the performance measures of average cycle time and cycle time
variance when comparing MIVP® K-Step-Ahead®
to FIFO with constant
arrival rates when comparing the loading of the bottleneck machines at 85%
(Torsina 1997) and 95% (Balgemann 1997).
The scope of this research was limited to a steady state factory whose data was provided by SEMATECH. The data emulates a 2-product DRAM semiconductor FAB. The following assumptions were made prior to construction of the simulation model:
1.
The
SEMATECH data were assumed to be correct and represent the actual condition of
a real semiconductor fabrication facility (FAB).
2.
The
batch size was held constant. Presenting different batch sizes, though it makes
the model more detailed, was not essential to the comparison of MIVP® K-Step-Ahead®
with FIFO.
3.
The
modeled FAB was assumed to be fully automated. Therefore, labor was treated as
a nuisance variable for this project.
4.
Machine
setups were not taken into account because MIVP® was not a policy
intended to improve performance through minimizing setup times. In addition,
setup times can be implemented by increasing processing times to include a
prorated setup time without jeopardizing the comparative results. Therefore,
setup times were ignored.
5.
The
release policy was fixed for each set of comparisons to maintain the two
capacities at the bottleneck section of the FAB at 85% and 95%.
6.
Rework
and scrap were not significant therefore they were omitted.
7.
AutoMod/AutoSched® software was used. A
preliminary simulation run of the model using FIFO indicated that it took
approximately 24-hours to complete a single run of 700-days production using a
133 mega-hertz PC.
Semiconductor fabrication creates circuits in
layers, with each consisting of the following sequence of operations: chemical
cleaning, metal disposition, oxidation, photolithography, plasma chemical
etching, and ion implantation. This sequence will vary to some degree based
upon the circuit composition of the device being manufactured. The processes
are completed in a clean room facility, a manufacturing environment that
protects wafers from dust particle contamination.
Performance of a semiconductor FAB is generally
measured based on equipment utilization, production rate, average cycle time,
cycle time variance, due dates, work in process (WIP), and wafer yields. These
measures often conflict with each other. For example, increasing machine utilization
may create new bottlenecks which increases WIP and cycle time. Therefore, a
tradeoff must be made. The best solution will improve performance by reducing
inventory and overall cycle time. Due to the enormous cost required
constructing a semiconductor FAB, a 1% reduction in cycle time can mean
$200,000.00 to $300,000.00 per month increase in profits or additional
products.
2. MIVP® POLICY
The MIVP® policy consists of a
set of heuristics that evolved from the need to look at the overall system rather
than the local state in order to obtain the needed information required for
making appropriate scheduling decisions. Goldratt and Cox (1986) stated that
coordinating equipment upstream and downstream in the process would improve
overall throughput of the system. Connors, Feigin, and Yao (1994) showed why
relying on local information was a problem with most scheduling policies.
Although there are three variants of MIVP®, One-Step-Ahead®, K-Step-Ahead®, and K-Step-Ahead
J-Step-Back®, this project was limited
to One-Step-Ahead® and K-Step-Ahead®, 1 ≤ K ≤10.
The focus of the MIVP® policy is on the mean
and variance of cycle time (Li, Tang, & Collins, 1996). Cycle time impacts
semiconductor fabrication processes mostly in terms of wafer contamination
levels and production cost (Tang, 1993). As the wafers reside longer in
production, they are more exposed to dust particles that exist even in a clean
room facility. This may lead to rework or scrap. Cycle time is directly
proportional to inventory, which translates to cost. Moreover, a survey of several
Japanese semiconductor manufacturers identified that reduction of cycle time
was a significant objective (Duenyas, Fowler, & Schruben, 1994). The
variance of cycle time often determines how the due dates are met. The larger
the variance, the more chance that production misses the promised delivery
dates. Introducing variability into the system by changing processing time
distribution increases cycle time and inventory. Therefore, minimizing the
variability of scheduling resources improves performance of the system by at
least making it more predictable.
MIVP® works on the premise
that inventory has to exist in the factory. A zero inventory factory is
virtually impossible to achieve because inventory is needed to stabilize
production processes. MIVP® tries to efficiently
manage inventory so total inventory is distributed throughout the factory. MIVP® schedules lots based on
a heuristic algorithm that focuses on decreasing the man-made variability of
resource scheduling to reduce cycle-time and cycle-time variance, and therefore
reduce inventory costs.
2.1 MIVP
One-Step-Ahead®
The heuristic is presented in the priority
matrix of (Fig 1).

Fig. 1. Priority matrix for One-Step-Ahead (Source:
Tang, 1993)
MIVP® 1-Step Ahead works by
assigning one of four priorities to each individual part in a queue and selects
the next lot to process based on the four priorities given. Priority one takes
precedence over priority two, and so on. Priority one occurs when the current
queue is larger than the historical average, but the downstream queue is less
than the historical average. In this case, selecting priority one will balance
the queues toward the average. Selecting priority four is the least desirable
since it will increase the gap between the average and the current queue, and
tend to increase the downstream queue that is already above the average.
Priority two and priority three are "don't-care" conditions. Priority
two tends to move the products faster to the end of the line than priority
three.
To formulate the algorithm, let i1,i2,i3,…,in
be the operations assigned to a particular machine, and let i+1 be the
downstream operation of i.
Therefore,
Priority I: Operation i
such that
and
; (Eqn. 1)
Priority II: Operation i such that
and
; (Eqn. 2)
Priority III: Operation i such that
and
; (Eqn. 3)
Priority IV: Operation i such that
and
; (Eqn. 4)
(Li, Tang, & Collins, 1996)
Intuitively, an item coming from step k would
increase the queue length of step k+1 and decrease its queue length. In an
attempt to minimize the variation between the current inventory level and its
historical average, the product at step k with higher-than-average inventory
should be given higher priority than those with lower-than-average inventory. Note that every lot in the queue must be
given a priority before the dispatching occurs. Also, the priority assignment
is both product and process specific, the policy needs to look at queue
information of the same product type at the specific downstream process each
time a resource becomes available.
2.2 MIVP
K-Step-Ahead®
The K-Step-Ahead MIVP® heuristic extends the
concept of the One-Step-Ahead method to include two or more steps ahead in the
priority assignment. The algorithm has been modified from the original found in
the Li, Tang, & Collins (1996) paper.
Priority I: Operation i such that
and
; (Eqn.
5)
Priority II: Operation i such that
and
; (Eqn. 6)
Priority III: Operation i
such that
and
; (Eqn.
7)
Priority IV: Operation i such that
and
; (Eqn. 8)
3. PROBLEM FORMULATION
The objective of this study was to determine
whether there was a significant difference in average cycle time and cycle time
variance between FIFO and MIVP® K-Step-Ahead®. Table 1 describes the
essential information found in the SEMATECH data. There are two different
products (Part A w/210 process steps and Part B w/245 process steps) with
constant release policy and constant processing times. In the model, there are
83 machine groups that are determined both to fail (MTBF) and to repair (MTTR)
according to an exponential distribution.
Table 1. SEMATECH Data
Summary
Type
of product: Non-volatile
memory
Number of different products: 2
Number of machine
groups: 83
Process times
distribution: Constant
Time between failures
distribution: Exponential
Time to repair
distribution: Exponential
Launching policy: Constant
Lot size: 48
wafers
Start rate (Part A): 8 lots/day
Start rate (Part B): 4 lots/day
Raw processing time
(Part A): 271.41 hrs
Raw processing time
(Part B): 300.87 hrs
Building a simulation model of the two-product
DRAM factory based on the dataset provided by SEMATECH was the next step.
During the design of experiment, it was found
that the simulated-modeled factory was not stable. Since the cycle time chart
did not reach a steady state. This data was then checked with SEMATECH and they
agreed that the Dataset was in error and that, three machines were missing in
the bottleneck section of the factory. Accordingly, three machines were added
to these bottleneck processes, resulting in a steady state for both products.
As a part of the experiment, a pilot run was
also used to determine the truncation point for model ramp-up. When the
simulation started, the FAB was empty. The data that was gathered up to the
truncation point must be discarded. It contains initial bias as the FAB ramps
up its production to a steady state. A moving-average plot must be created to
determine the ramp-up period. SPSS, a statistical tool, was used to perform
this task. In this case, 100 simulation days were chosen as the ramp-up period.
Auto-correlation tests were done from the pilot
run data to determine the run length. Again, SPSS (1997) was used to plot the
auto-correlation. The simulation results have to be statistically independent.
Pegden, Shannon, and Sadowski (1995) suggested using a batch means approach to
obtain statistically independent results. If the batches are sufficiently
large, the means of two adjacent batches will be independent. The steps to
determine the appropriate batch size are as follows:
1.
Plot
an auto-correlation (ACF) chart of the observations. By viewing the chart, a lag
for which the correlation between observations remains significant was chosen.
Thus, the batch size of 30 should be enough to produce independent data points.
2.
Determine
the number of observations required by multiplying the batch size by 20.
3.
Calculate
an appropriate run length by using the following formulae:
Run length = (# of observations required x chosen lag) + ramp-up period) (Eqn. 10)
Run length = (20 x 30) +100 (Eqn. 11)
Therefore, the run length for this study was 700
simulation days including 100 days ramp-up period and 600 days of steady state
to calculate cycle times.
3.3 Actual
Runs and Output Analysis
The basic steps for every simulation study are
similar. In this research, data collection and the validity check were preformed
by SEMATECH. An auto-correlation check was the most important stage of the
simulation process. Omitting this process would have lead to poor and
unreliable results. Therefore, the hypothesis tests were an integral part of
this study.
The simulation was run according to the run
length specified for both FIFO and MIVP® policies. Using the
specified batch size, both the batched average cycle time and cycle time
variance was calculated using the awk
utility, implemented in UNIX. Thereafter, analysis of the research using a
two-tail t-test was done, comparing the average cycle time from FIFO to those
from MIVP® K-Step-Ahead®.
Using the same two-tail t-test method,
additional hypothesis tests were performed to compare the variances between
FIFO and MIVP® K-Step-Ahead®.
A total of twenty-two sets of simulations were
run to determine the final comparative results. The first of each set of eleven
included the baseline of FIFO, 1-Step-Ahead MIVP® through 10-Step-Ahead
MIVP®
with the FAB loaded at 85% capacity at the bottleneck section. The second set
of eleven included the baseline of FIFO, 1-Step-Ahead MIVP® through 10-Step-Ahead
MIVP®
with the FAB loaded at 95% capacity at the bottleneck section.
Prior to the study, it was concluded that
collecting data beyond 10-Step-Ahead was not necessary since MIVP® is intended for
short-term decision making. By looking beyond 10 steps, decisions are made at
least 4.23 hours for Part A before it arrives at the
10th step ahead, and 7.03 hours for Part B.
Therefore, the effectiveness of the decision made is questionable because of
the changes caused by variability during these times.
Microsoft Excel (Windows’97) was used to perform
all hypothesis tests. Each result shows a two-tail t-test for average cycle
time and cycle time variance, both for Part A and for Part B. It was determined
that hypothesis tests for Part A and Part B must reject the null hypothesis,
suggesting that the MIVP® K-Step-Ahead®
algorithm have superior
performance. The value of P(T ≤ t) for two-tail t-test must be below 0.05
to reject the null hypothesis at 95% confidence level.
The numbers for results presented in Table 2.
are in days. Hypothesis tests were performed for each Part A and Part B for
average cycle time and cycle time variance.
Table 2. Constant Arrival Rate @ 85% Capacity* Constant Arrival Rate @ 95% Capacity**
FIFO & MIVP® FIFO & MIVP®
|
No. of Steps
Ahead |
Cycle Time Average
Days* |
Null Hypothesis * |
Cycle Time Variance
Days* |
Null Hypothesis * |
|
Cycle
Time
Average
Days** |
Null Hypothesis ** |
Cycle Time
Variance Days** |
Null Hypothesis ** |
FIFO
- A
B |
21.041
26.307 |
|
0.076
0.110 |
|
|
39.216
46.963 |
|
4.710
4.834 |
|
|
1-Step A
Ahead
B |
20.664
24.982 |
Rejected
Rejected |
0.065
0.069 |
Yes
Yes |
|
34.351
46.963 |
Rejected
Rejected |
0.163
0.178 |
Rejected
Rejected |
|
2-Step
A
Ahead B |
21.271
25.382 |
Rejected
Rejected |
0.057
0.088 |
Yes
Yes |
|
34.286
40.830 |
Rejected
Rejected |
0.114
0.145 |
Rejected
Rejected |
|
3-Step A
Ahead
B |
21.382
25.475 |
Rejected
Rejected |
0.066
0.084 |
Yes
Yes |
|
32.811
39.721 |
Rejected
Rejected |
0.261
0.196 |
Rejected
Rejected |
|
4-Step
A
Ahead
B |
20.944
25.209 |
Yes
Rejected |
0.059
0.086 |
Yes
Yes |
|
33.131
39.388 |
Rejected
Rejected |
0.119
0.208 |
Rejected
Rejected |
|
5-Step
A
Ahead
B |
21.226
25.659 |
Yes
Rejected |
0.056
0.095 |
Yes
Yes |
|
33.327
38.145 |
Rejected
Rejected |
0.158
0.207 |
Rejected
Rejected |
|
6-Step
A
Ahead
B |
20.839
25.640 |
Yes
Rejected |
0.053
0.300 |
Yes
Yes |
|
33.965
39.158 |
Rejected
Rejected |
0.065
0.181 |
Rejected
Rejected |
|
7-Step
A
Ahead
B |
20.764
25.357 |
Rejected
Rejected |
0.061 |