Given the economics of FAB performance, these decisions should be based on sound systems models built on fundamental principals. Unfortunately, these important decisions are currently based on a little local data and rough rules of thumb. The main goals of this research project were:

· To investigate novel applications and employ proven tools from the theory of dynamical systems and from control theory to the factory-wide resource scheduling (decision) problem and product release generation in semiconductor manufacturing, and

· To develop a model for university-industry dialog in the semiconductor manufacturing area by having industry personnel and interdisciplinary faculty and students working as active participants in the research.

The Systems Science and Engineering Research Center

SSERC is made up of faculty and students from across many departments and three colleges, College of Engineering and Applied Sciences, College of Liberal Arts and Sciences and the College of Technology and Applied Sciences. The objective of the Center is to foster interdisciplinary research work for faculty and students. The faculty meets at least once per week in a scheduled seminar series where individuals and groups present their latest research. An outside speaker is brought in from either industry or another university several times per semester. The Center also sponsors a 1 to 2 day mini-conference per academic year on topics of specific interest to its members. This has been an excellent model to introduce faculty and students to new ideas for interdisciplinary collaboration. The small group of faculty listed here is an example of this collaboration. Each member brings his/her own expertise and when integrated makes the total more than just the sum of the individuals.

This interdisciplinary research encompasses hierarchical mathematical and stochastic simulation modeling for semiconductor manufacturing, from the release of raw wafers at the start through the completion and shipment of the devices. The implementation of “optimal scheduling policies” has recently been recognized as an important and challenging problem in the Semiconductor Industry^{2,7,18,20,45,46}. The competitive operation of modern fabrication processes requires the development of precise rules for allocating the available resources within the FAB so as to optimize the production performance. Although simply stated, such an objective is elusive, primarily due to the size and complexity of modern FABs. The determination of an optimal scheduling policy remains highly nontrivial, involving the solution of a constrained optimization problem with respect to often-conflicting objectives while any admissible policy must possess certain robustness properties in the presence of uncertainty. This research has developed hierarchical simulation modeling software tools that can be used to manage variabilities arising on the FAB floor^{3,4,5,6,7,8,10,11,15,18,23,24,25,26,31,38,43}. These tools will enable managers and operators to avoid work in progress (WIP) build-ups caused by these variabilities. We investigated the integration of several levels of FAB flow product-release and resource-scheduling algorithms integrated with machine process controllers, including predictive controllers in real time (see Figure 1.) with the aid of discrete event simulation.

Information Systems Management

Intelligent information systems are at the heart of control, processing and optimization of

semiconductor manufacturing^5,7,18,20,45. Our goals for the information support systems integrated with the FAB Manufacturing Execution System (MES) such as PROMIS^Ò or WorkStream^Ò and Master Database system such SAP^Ò or Oracle^Ò include provisions for a knowledge-based, multi-level integrated architecture for information flow/processing across all stages of manufacturing from oxide growth chamber simulations through controller and supervisory levels to the enterprise level^{4,5,10,11,12,13,14,15,18,26,31,36,38,39,40,41,42,43,44,45,46,47}.

Specifically, in the context of semiconductor manufacturing, data analysis and data mining are the basis for quality control assurance, prediction of time to failure, raw material needs, inventory control, executive report generation, etc. In the context of our multi-level information system architecture, data analysis and filtering must take place at all levels. Basically, raw data is modeled into a summative form, and then passed on for use at another level. As information travels up the hierarchy, more refined numbers and semantics are included.

The research involved the development of effective simulation models of existing FABs. Present plans are to extend beyond the simulation and include effective interaction with the FABs relational databases (e.g., Motorola’s PROMIS^Ò and Intel’s WorkStream^Ò). In particular, bi-directional interfaces for all controllers, schedulers, and release generators are being investigated (Figure 1.). There are four levels in the hierarchy of a FAB integrated simulation model. The lowest level (level 1) comprises machine process controllers^20,31; next (level 2) predictive controllers^47,47,54,55; third (level 3) resource schedulers^{3,4,5,6,7,8,19,21,22,23,26,41,42}, and finally (level 4) the product release generator²². The long-range objective of this research is to assist FAB Managers in maintaining a stable FAB with maximum utilization of resources and with minimum inventory in an acceptable time frame.

Our research was based on past and existing multidisciplinary ASU/Intel team(s) and ASU/Motorola team(s) organized through the SSERC working on operational methods for semiconductor manufacturing. The ASU/Intel team(s) have been working on an Intel provided abstract problem of the FAB process and the ASU/Motorola team(s) have been working in several FABs solving multiple scale problems from the atomistic scale of Chemical Vapor Deposition (CVD)^2,44 to machine level controllers in diffusion and to predictive controllers for Reactive Ion Etch (RIE)²⁵ process to resource scheduling and product release generators of actual FABs.

A specific problem motivated by these predictive maintenance controllers is to design scheduling and release policies that maintain the highest possible performance in the presence of regular maintenance operations or, in general, predictable equipment failures^11,47. It is clear that for this to be possible, the scheduling algorithm should exchange information with the low-level controllers and in turn with the release policy generator. In this respect, our goal was to investigate the type of information that needs to be communicated. For example, based on our recent work on uncertainty characterization in system identification, the "in-spec" operation of the real-time controllers can be described with relatively simple and computable measures.

While such procedures can help in predicting potential equipment failures, the use of this information by the scheduling and release policies remains unclear. During our recent work we

observed that this problem could be formulated as a time-varying control problem, for which control theory offers a variety of tools. Our plan was to investigate the use of Model-Based compensatory design techniques to develop and test scheduling algorithms that provide "near-optimal" performance with respect to large-but-low-frequency perturbations, such as predictable equipment failures and emergency maintenance.

A Mini-FAB Model

Intel has provided the basic definition of the abstract problem in an operational format. One facet has been the specification of a FAB model (see Figure 2.). The Intel design goals for this model were:

· to include all of the relevant features that make semiconductor manufacturing operations difficult, and

· to structure the model so that the features could be included incrementally and could be increased (decreased) in magnitude of impact.

The features included are re-entrant flow, multiple products including test wafers, equipment sets with variable availability from both preventive and emergency maintenance, equipment sets that require different setups for different process steps and products, equipment sets that batch, technicians that have overlapping training and floor responsibility for loading and repairing machines, a multi-cell layout, a finite capacity material handling system with transporters and stockers, and multiple performance metrics including both volume and speed. Another facet has been the details of how Intel would run the modeled FAB given the current operational methods used across Intel FABs. This model and these metrics have been encoded into a simulation-based test-bed using the Extend^â simulation software to provide realistic evaluation of new ideas against Intel’s current practice.

Figure 2. Schematic diagram of the Intel 5 machines 6 steps process flows¹⁹

Technical Summary of the Research

Fundamentally, the problem of scheduling of semiconductor manufacturing operations and product release is a problem of resource allocation in the presence of uncertainty. This can be viewed as a systems/controls problem where resources or manipulated variables include the release of material into the FAB, production machines, transportation systems, and operators’ etc. Uncertainty enters in several aspects of machine and work availability, e.g., machine failures, operator reliability, etc. In an attempt to re-cast this problem in a more tractable form, simplified descriptions of the FAB are frequently employed (e.g., flow models)^1,16 while much of its variability is attributed to generic uncertainty. Such a description is useful in extracting gross properties of the manufacturing system, but its applicability is limited. In general and even in the absence of stochastic perturbations or modeling errors, the manufacturing systems under consideration cannot achieve the performance suggested by simple flow models. The principal obstacles are the nonlinear dynamics caused by the re-entrant nature, batching, and the generally nontrivial relations between the processing, transport, and loading times. Following simulations of an abstraction of an Intel FAB, there is strong evidence^19,37 that the dynamics of re-entrant manufacturing systems behaves chaotically, see also^1,16. Moreover, these effects become more pronounced and critical as the manufacturing system is pushed to operate near capacity. For this reason, we believe that an in-depth analysis of the nonlinear dynamics involved in manufacturing systems will be crucial in the design of effective scheduling and control systems. We propose a hierarchical approach^10,43 based on the previously mentioned time-scale decomposition between short- and long-term objectives. We will model the fast time-scale where decisions are made at the machine level, through detailed models that describe the nonlinear system dynamics (“inner-loop” or “low-level” controller). The objective of the inner-loop controller is to follow, as well as possible, commands issued by the high-level (outer-loop) controller. Operating on a fast time-scale, it can take into account the process nonlinear dynamics and define operating trajectories that trade-off variability minimization, cycle-time minimization and throughput maximization in a locally optimal way. Effectively, the inner-loop controller allows the approximation of the system by a simpler aggregate model for which the computation of long-term optimal scheduling strategies can be performed in a systematic and efficient manner. The high-level decisions evolve at a slow time-scale (e.g., daily or weekly) and are based on aggregate models aimed to optimize the overall system performance, compensating for infrequent or low frequency variabilities.

The study of control-oriented modeling involves the model development of manufacturing systems for control purposes, using techniques/ideas from linear and nonlinear robust control theory. Here, model aggregation and characterization of the resulting modeling error will be central in assessing the fidelity of the predicted closed-loop performance^{7,8,2,10,11,15,18,25,42,43,53,54}.

Motorola has provided Ringhofer, et al, FAB data for real time control of Chemical Vapor Deposition (CVD) processes. CVD processes a mixture of reacting gases together with a wafer in a reaction chamber, depositing a thin film on the surface^{2,18,28,29,30,31,32,33,34,35}. This process is one of the fundamental processing steps in semiconductor manufacturing. A full process simulator has been developed to enable control of the film thickness and its morphology from external reactor set points and allow for the extraction of parameters for higher level controllers. To simulate simultaneously in real time the gas flow in the reactor and the evolution of the wafer surface involves extremely challenging computational problems, which are amenable to solutions using parallel and distributed computer architectures.

Motorola has provided Si, et al²⁵, a large amount of production data for the Reactive Ion Etching (RIE) process to study ways to monitor and control the process at the tool level. We will systematically study the functional correlation between in-situ sensor measurements, post process measurements and optical emission end-point signals. One of the critical signals for this study is the optical emission end-point trace, since in current engineering practice this signal is used as the sole input to determine the end point of etching processes, such as polysilicon, metal and oxide etches. This optical emission trace has embedded in it information about the plasma, the effect of the plasma on the wafer, and consequently, the final wafer attributes.

There were two specific aims included in the RIE research. 1) To achieve tight real time control over the etch time to reduce final wafer variances in remaining and critical dimensions. 2) To provide real time correlation analysis for "out of norm" optical emission signals in order to determine their causes for either warnings or control. To achieve the above goals, we have developed predictive models for the optical emission traces from real time in-situ measurements, an optimizer to determine the main etch time that leads to minimum variance in final wafer dimension, and an off-line analysis relating in-situ sensors to post measurements. Si, et al performed a systematic analysis of existing historical data to differentiate between "normal" from "abnormal" in-situ patterns entirely based on existing/available production data from Motorola.

Study of the fundamental performance limitations

An important problem at this level was to establish the theoretical performance limitations that are due to re-entry, batching and set-up times. For this purpose, discrete optimization techniques were used, reminiscent of statistical mechanics and simulated annealing, to map out boundaries of the “feasible region.”

Design of inner- and outer-loop scheduling policies

Here, the results of the previous analysis will be integrated with long-term optimization/control policies in a practical methodology for the design of scheduling policies. This involved tools from optimal, nonlinear and time-varying control theory^23,39,45.

Summary

The researchers investigated the novel application of proven tools from modern control theory to the factory-wide semiconductor fabrication problem. Adopting a hierarchical approach, their objective was to provide a general and systematic methodology for the design of long-term, e.g., daily, scheduling and release policies.

In particular, the main focal point of this research revolved around the relation between low-level control (e.g., real-time) variability and high-level control (scheduling) performance. As shown by Flores-Goday, et al, in our recent work (and well understood in practice, Little’s Law and Kingman’s Formula), tight low-level control can provide a significant improvement of the variability in scheduling operations ^{3,4,5,6,7,8,10,21,25,26,42}. It was also evident, however, that a suitable design of the scheduler is necessary in order to take full advantage of the tight low-level control.

At the second level of research, we looked into real time process scheduling problems. As is well known, the job-shop problem is one of the NP-complete problems. Various scheduling strategies such as FIFO, etc., have been investigated by Collins, et al, at a Motorola FAB^{36,38,39,40,41,42,43}. The results were a 33.9% reduction in cycle-time over a period of six months.

The present focuses on real time scheduling using heuristic rules ^{3,4,5,6,7,8,19,21,22,23,24,26,28,29,30,31,32,}

^{33,34,35,37,38,39,40,41,42,43}. Aside from the traditional constraint optimization approaches, and heuristics, we are presently investigating with a Ph.D. Student and a Masters Student a computational tool based on learning. Various schedulers are taken as input to the "intelligent" scheduler; a pattern analyzer is first used to screen these inputs in order to figure out the correlation’s among various input patterns. Another intelligent agent will then be used to judge whether the performances of the known schedulers. A positive reinforcement is released for good performance and the associated pattern is associated closer to the schedule, otherwise a penalty will be given. By such an approach, we believe the scheduler will learn to be smarter and smarter. We have conducted some basic research in this form of learning. Our closed loop system has demonstrated its improved performance over learning. Once the system is trained, delivering a schedule should be automatic.

Results

The overall goal of this team of researchers will be to develop control policies that can be evaluated by means of simulations and, eventually, results in implementations in real FABs.

Bibliography

1. Beaumerage, T. and Kempf, K., The nature and origin of chaos in manufacturing systems, Proceedings of the IEEE Advanced Semiconductor Manufacturing Conference, November 1994, pp. 169-174.

2. Cale, T.S., Crouch, P.E., Song, L. and Tsakalis, K.S., “Optimal Control for LPCVD,” Proc. Symposium on Process Control, Diagnostic and Modeling in Semiconductor Manufacturing, The Electrochemical Society, Vol. 95-2, 97--107, Reno, May 1995.

3. Collins, D.W., Williams, K., and Hoppensteadt, F.C., Implementation of Minimum Inventory Variability Scheduling 1-Step Ahead Policy in a Large Semiconductor Manufacturing Facility, 6th Annual IEEE International Conference on Emerging Technologies and Factory Automation, UCLA, Los Angeles, Sept 9-12, 1997.

4. Collins, D.W. and Hoppensteadt, F.C., Investigation of Minimum Inventory Variability Scheduling Policies in a Large Semiconductor Manufacturing Facility, 1997 American Control Conference, Albuquerque, New Mexico, June 4-6, 1997.

5. Collins, D.W. “The Implementation of a Simulation Model from Raw Wafer Arrival Through Probe and Shipping”, The 3rd Annual Semiconductor Manufacturing Control and Optimization Workshop, Sponsored by the Systems Science and Engineering Research Center, Arizona State University, February 14, 1997.

6. Collins, D.W. “Test Minimum Inventory Variability Policies (MIVP) by Implementation within a real Wafer FAB using Discrete Event Simulation Modeling”, Large Database Workshop, Sponsored by the Systems Science and Engineering Research Center, Arizona State University, January 24, 1997.

7. Collins, D.W. and Zaslavsky, B.G., “A Numerically Effective Optimization Technique for Scheduling Time Varying Production Flows in Semiconductor Manufacturing”, INFORMS 1996 Conference, Atlanta Georgia, November 3-6, 1996.

8. Collins, D.W., “Minimum Inventory Variability Schedule with Applications in Semiconductor Fabrication”, Proceedings of Motorola International Symposium on Factory Integration and Modeling, March 13-14, 1995, Austin Texas (invited paper)

9. Dimitrova, N. & Golshani, F., "Motion recovery for video content classification", ACM Transactions on Office Information Systems, Vol. 13, No. 4, Oct. 1995, pp 418-449.

10. ElAdl, M.K., Rodriguez, A.A. and Tsakalis, K.S., “Hierarchical Modeling and Control of Re-Entrant Semiconductor Manufacturing Facilities,” Proc. 36th Conference on Decision and Control, 1737--1743, Kobe, Japan, Dec. 1996.

11. Flores-Godoy, J.J., Wang,Y., Collins, D.W., Hoppensteadt, F.C., and Tsakalis, K, “Intel Mini-FAB Simulation Model comparing machine scheduling polices of FIFO with MIVP^Ò with constant release policy and using a PID controller and H^¥ controller for the diffusion bay for a priori maintenance.”, presented at the SSERC Seminar of Multiscale Integration of Manufacturing and Assembly Processes, October 17, 1997, ASU.

12. Golshani, F., Nielson, G. and Henderson, M., "Multimedia processing in concurrent engineering", in Concurrent Engineering, Vol. 2, 1994, pp 138-143.

13. Golshani, F. & Kadur, S. “Control of Delay in Continuous Multimedia Applications”, in “Multimedia over the Broadband Network: Business Opportunities and Technologies”, International Engineering Consortium, 1996, pp 309-320

14. Golshani, F., Henderson, M., & Nielson, G., "The impacts and applications of visualization and multimedia technologies in concurrent engineering", Scientific Computing and Automation, Vol. 12, No. 10, 1995, pp 15-26.

15. Grassi, E. and Tsakalis, K.S., “PID Controller Tuning by Frequency Loop-Shaping,” Proc. 36th Conference on Decision and Control, 4776--4781, Kobe, Japan, Dec. 1996.

16. Hoppensteadt, F., Analysis and Simulation of Chaotic Systems, Springer-Verlag, New York, 1993.

17. Hoppensteadt, F., Mathematical Methods of Population Biology, Cambridge University Press, New York, 1982.

18. Jun, K.S., Rivera, D.E., Tsakalis, K.S., Liaw, H.M., Hall, E., and Stein, C., “PID Optimization for Temperature Control of Epitaxial Growth,” Proc. ECS Conference, 383--384, Montreal, Feb. 1997.

19. Kempf, K., Detailed description of a two-product, six-step five-machine re-entrant semiconductor manufacturing system, prepared report, Intel Corporation, Technology & Manufacturing Group, August, 1994”, also summarized in http://enuxsa.eas.asu.edu/~tsakalis/INTEL.htm.

20. Kristoff, J.J., Song, L.J., Tsakalis, K.S. and Cale, T.S., “Optimally Controlled Programmed Rate Deposition of Tungsten,” VLSI Multilevel Interconnect Conference}, Santa Clara, CA, June 1997.

21. Kumar, P.R., Re-entrant lines, Technical report, Coordinated Systems Laboratory, University of Illinois, Urbana, IL, received 1994.

22. Kumar, S. and Kumar, P.R., The last buffer first serve priority policy is stable for stochastic re-entrant lines, Technical report, Coordinated Systems Laboratory, University of Illinois, Urbana, IL, received 1994.

23. Li, S., Tang, T, and Collins, D.W., “Minimum Inventory Variability Schedule with Applications in Semiconductor Fabrication,” IEEE Transaction on Semiconductor Manufacturing, Vol. 9, No. 1, pp. 146-149, Feb. 1996.

24. Li, Shu, Tang, T., and Collins, D.W., Minimum inventory variability schedule with applications in semiconductor fabrication, in: Motorola International Symposium on Factory Integration and Modeling, March 13-14, Austin, Texas, Motorola, Manufacturing Technology Group, 1995.

25. Limanond, S., Si, J., and Tseng, YL., "Production data based optimal etch time control design for a reactive ion etching process" IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, 12: (1) 140-147 FEB 1999.

26. Palmiri, V. and Collins, D.W., Analysis of the “K-Step Ahead” Minimum Inventory Variability Policy Using SEMATECH Semiconductor Manufacturing Data in a Discrete-Event Simulation Model, 6th Annual IEEE International Conference on Emerging Technologies and Factory Automation, UCLA, Los Angeles, Sept 9-12, 1997.

27. Rastogi, R., Kozicki, M., & Golshani, F. "ExPro: An expert system based process management system", IEEE Trans. on Semiconductor Manufacturing, Vol. 6, No. 3, 1993, pp 207-218.

28. Ringhofer, C. and Poupaud, F. Quantum Hydrodynamics in Semiconductor Crystals', Appl. Math. Letters 8, pp.55-59, 1995.

29. Ringhofer, C. with Arnold, A., 'An Operator Splitting Method for the Wigner Poisson Problem', SIAM J. Num. Anal. 34,pp. 1622-1644 1996.

30. Ringhofer, C. and C. Gardner The smooth quantum potential for the hydrodynamic model' , Phys. Rev. E 53, pp.157-167, 1996.

31. Ringhofer, C., Gobbert, M.K. and Cale, T.S., One approach to combining equipment scale and feature scale models', In M. Meyyappan, D.J. Economou, and S. W. Butler, editors, Process Control, Diagnostics, and Modeling in Semiconductor Manufacturing, pages 553-563. Electrochemical Society, 1995.

32. Ringhofer, C. and Poupaud, F., 'Semi - classical limits in a crystal with exterior potentials and effective mass theorems' Communications in Partial Differential Equations 21, pp.1897-1918, 1996.

33. Ringhofer, C. 'Computational Methods for Semiclassical and Quantum Transport in Semiconductor Devices', 'Acta Numerica' pp. 485-521, 1997.

34. Ringhofer, C. and Gobbert, M.K., 'An asymptotic analysis for a model of chemical vapor deposition on a micro structured surface' to appear, SIAM Journal on Applied Mathematics.

35. Ringhofer, C. and Arnold, A., 'Operator Splitting Methods Applied to Spectral Discretizations of Quantum Transport Equations', SIAM J. Num. Anal. 33, pp.1876-1894, 1995.

36. Spanos, J., et. al., "Real-time statistical process control using tool data", IEEE Tran. Semiconductor Manuf., vol. 5, no. 4, 1992.

37. Srivatsan, N. and Kempf, K, A linear programming model of a re-entrant system, prepared notes, Intel Corporation, Technology & Manufacturing Group, July, 1994.

38. Stoddard, K.D., Crouch, P.E., Kozicki, M. and Tsakalis, K.S., “Application of Feed-Forward and Adaptive Feedback Control to Semiconductor Device Manufacturing,” Proc. American Control Conference, 892--896, Baltimore, 1994.

39. Tsakalis, K. S. and Ioannou, P. A., Linear Time-Varying Systems: Control and Adaptation. Prentice-Hall, Englewood Cliffs, New Jersey, 1993.

40. Tsakalis, K. S., "Robustness of Model Reference Adaptive Controllers: An Input-Output Approach,'' IEEE Trans. Automat. Contr., Vol. 38, No. 5, pp. 556-565, May 1992.

41. Tsakalis, K.S. and Limanond, Suttipan, “Asymptotic Performance Guarantees in Adaptive Control,” Int. J. of Adaptive Control and Signal Processing, 1994.

42. Tsakalis, K.S., “Performance Limitations of Adaptive Parameter Estimation and System Identification Algorithms in the Absence of Excitation,” Automatica, 1996.

43. Tsakalis, K.S., Flores-Godoy, J.J. and Rodriguez, A.A., “Hierarchical Modeling and Control of Re-Entrant Semiconductor Fabrication Lines: A Mini-Fab Benchmark,” Proc. 6th IEEE Int. Conference on Emerging Technologies and Factory Automation, 508--513 Los Angeles, Sept. 1997.

44. Tsakalis, K.S. and K.D. Stoddard, “Integrated Identification and Control for Diffusion/CVD Furnaces Proc. 6th IEEE Int. Conference on Emerging Technologies and Factory Automation,” 514--519 Los Angeles, Sept. 1997.Vaja, S. et al., Similarity transformation approach to identifiability analysis of nonlinear compartmental models, Math. Biosci, 93, n. 2, 217 -248, 1989.

45. Zaslavsky, B.G., Rodriguez, A.A., and Collins, D.W. “Time Optimal Control for Re-entrant Semiconductor Fabrication Lines,” Submitted to 37th IEEE Conference on Decision and Control, December 10-12, 1997.

46. Zaslavasky, B.G., Collins, D.W., and Rodriguez, A.A., Optimization of manufacturing processes by positive control methods, Submitted June 28, 1995, for IFACí95 World Congress.

47. Zaslavsky, B.G. and Collins, D.W., "Positive Control Approach to Semiconductor Scheduling Problems", Proceedings of Motorola International Symposium on Factory Integration and Modeling, October 19-20, 1995, Tempe, AZ (invited paper).

Biographical Information

DONALD W. COLLINS

Donald Collins is a Professor of Manufacturing Engineering Technology, at Arizona State University East. He received his M.S. and Ph.D. in Electrical Engineering and Computer Science from the University of Illinois, Chicago. Dr. Collins is an international consultant to semiconductor companies throughout the US and Japan.

FOROUZAN GOLSHANI

Forouzan Golshani is a Professor of Computer Science at Arizona State University. Dr. Golshani received a B.S. in Industrial Engineering from Arya Mehr University of Technology, Tehran, Iran, in 1976, a M.S. and Ph.D. in Computer Science in 1979 and 1982, respectively, from Warwick University, England. He has authored 120 papers and nine US patents.

FRANK HOPPENSTEADT

Frank Hoppensteadt is a Professor with a joint appointment in Mathematics and Electrical Engineering at Arizona State University. He is also the Director of Systems Science and Engineering Research Center. Dr. Hoppensteadt received a B.S. in Mathematics and Physics from Butler University in 1960, and a Ph.D. in Mathematics from the University of Wisconsin in 1965. Dr. Hoppensteadt is author and co-author of many books and several patents.

CHRISTIAN RINGHOFER

Christian Ringhofer, is a Professor in Mathematics at Arizona State University. Dr. Ringhofer received a B.S. in Mathematics from the Technical University of Vienna in 1978, a M.S. in Computer Science in 1980 from Technical University of Vienna, and a Ph.D. in 1981 from the Technical University of Vienna, Austria.

JENNIE SI

Jennie Si is an Associate Professor of Electrical Engineering at Arizona State Universtiy. Dr. Si received a B.S. in 1985 from Tsinghua Unviersity, an M.S. in 1988 from Tsinghua University as well, and a Ph.D. from the University of Notre Dame in 1991.

KOSTAS TSAKALIS

Kostas Tsakalis is an Associate Professor of Electrical Engineering at Arizona State University. Dr. Tsakalis received a B.S. in Ch.E. from NTUA, Greece, in 1983, M.S. in Ch.E. in 1984, E.E. in 1985, and a Ph.D.in E.E. in 1988, all from USC.

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Interdisciplinary Research on

Modeling and Scheduling of Semiconductor Manufacturing Operations

Arizona State University

Abstract